In March 2020, RISC-V International was incorporated in Switzerland based on no one country, company, government, or event. This move is reflective of community investing in RISC-V for the next 50+ years.
Calista Redmond is the CEO of RISC-V International with a mission to expand and engage RISC-V stakeholders, compel industry adoption, and increase visibility and opportunity for RISC-V within and beyond RISC-V International. Prior to RISC-V International, Calista held a variety of roles at IBM, including Vice President of IBM Z Ecosystem where she led strategic relationships across software vendors, system integrators, business partners, developer communities, and broader engagement across the industry. Focus areas included execution of commercialization strategies, technical and business support for partners, and matchmaker to opportunities across the IBM Z and LinuxOne community. Calista’s background includes building and leading strategic business models within IBM’s Systems Group through open source initiatives including OpenPOWER, OpenDaylight, and Open Mainframe Project. While at IBM, she also drove numerous acquisition and divestiture missions, and several strategic alliances. Prior to IBM, she was an entrepreneur in four successful start-ups in the IT industry. Calista holds degrees from the University of Michigan and Northwestern University.
Esperanto Technologies: Esperanto delivers high-performance, energy-efficient computing solutions, the compelling choice for the most demanding AI / ML / DL applications. Our founding team, with many decades of processor design and architecture experience, is dedicated to delivering solutions to help drive future computing innovation. The changing, computationally intensive, workloads of the machine learning era mandate a new clean-sheet solution, without the baggage of existing legacy architectures. Esperanto leverages the simple, elegant, open standard RISC-V instruction set architecture (ISA) to deliver flexibility, scalability, performance and energy-efficiency advantages.
Eiji Kasahara Eiji is a Sr. CPU Architect for Esperanto‘s SOC(Supercomputer on Chip). His recent RISC-V association’s achievements include Organizer and Program Committee, the planning of RISC-V related translation books, and 2017 and 2018 speaker. Eiji is also famous for his role as an architect of PlayStation3’s Cell Broadband Engine (CELL/BE). Eiji was responsible for development of CELL/B.E design, power-performance, semiconductor process technologies in 90nm, 65nm, and 45nm generation SOI process technologies to reduce cost and power as Deputy of STI(Sony-Toshiba-IBM) Design Center in Austin, Texas. Before joining Sony Corporation, Eiji developed NEC SX-5 supercomputer and NEC ACOS4 mainframe computers in Japan.
KAMAKE no SUSUME Corp. offers event programming service including computer programming and gizmo-building classes for children and working adults, human resource activation events and training for local communities and companies, promotion of STEM education in collaboration with educational institutions and companies, and enriches people’s lives.
Takahiro Kitayama was born in Osaka, and completed the Department of Electrical and Electronic Engineering, Graduate School of Engineering, Kobe University, and joined Renesas Electronics Corporation in 2013. In 2014, he started with volunteer engineers on holidays. He founded “KAMAKE no SUSUME Corp.” in December 2017.
Keio University Faculty of Science and Technology Department of Information Engineering: Keio University Amano Lab researches new computer architecture in Post-Moore Age. As semiconductor scalings are stopping, it’s time to create new computers with special purpose, reduced power, and dynamic structure. His team is not only conducting simulation but also creating actual LSI chip and board, system construction and verification.
Prof. Hideharu Amano received his Ph.D. in 1986 from Keio University. He was a visiting assistant professor at Stanford University from 1989-1990. Now, he is a professor at the Department of Information and Computer Science, Keio University. Hideharu Amano started research on computer architecture under the professor Hideo Aiso, Department of Electrical Engineering, and shared memory, cache, switch chip, multiprocessor, reconfigurable system, massively parallel system, router chip, multi-context device, power saving Reconfigurable accelerator, ultra-low power processor, consistent architecture research. It is known for its approach to developing and evaluating real systems to demonstrate ideas. In addition to translating Hennessy Patterson’s “quantitative approach”, he has held numerous academic committee positions and positions.
Fifteen years in business and a founding Premier member of RISC-V International, Andes Technology is a leading supplier of high-performance/low-power 32/64-bit embedded processor IP solutions, and a main force to take RISC-V mainstream. Andes’ fifth-generation AndeStar™ architecture adopted the RISC-V as the base. Its V5 RISC-V CPU families range from tiny 32-bit cores to advanced 64-bit cores with DSP, FPU, Vector, Linux, dual-issue and/or multicore capabilities. The annual volume of Andes-Embedded SoCs has exceeded 1 billion since 2018. For more information, please visit https://www.andestech.com
Florian Wohlrab is one of the first RISC-V Ambassadors and Head of Sales for EMEA and Japan at Andes Technology. His mission is to help bring RISC-V towards mainstream and enable others to easily get started within the RISC-V ecosystem. He is fascinated by the open, modular, compact and innovative RISC-V CPU designs. Before joining Andes Technology he worked in industrial PC and IoT fields, holding various technical and business roles within Europe and Asia.
SH Consulting Group (Software Hardware Consulting Group) is a company that supports RISC-V software development and hardware development. We are developing AWS FreeRTOS WiFi client using RISC-V, AI software framework on RISC-V Linux, etc.
Shumpei Kawasaki co-founded SH Consulting in 2013. He specialized in the field of security for RISC-V FPGAs / SoCs. In 1990s, he co-developed CPUs and chipsets for Sega Saturn and Dreamcast video games. ARM adopted his “16-bit fixed-length instruction” invention for their monumentally successful “ARM7TDMI” and “ARM9TDMI.” In 2000s Shumpei led a development of a minimal operating system for Root of Trust chips used in network routers, 2-5G mobile handsets, and secure tokens in US.